1. Field of the Invention
The present invention relates to a high-frequency circuit having a high-frequency switch capable of being driven by a low voltage which is built into in a portable device such as a cellular phone.
2. Description of the Related Art
Dazzling developments have been made in mobile communications such as cellular telephones and personal communications in recent years. In Japan, for example, in addition to the conventional 800 MHz band analog cellular phones, 800 MHz and 1.5 GHz band digital cellular phones (PDC) have been newly commercialized and, several years ago, the xe2x80x9cPersonal Handiphone Systemxe2x80x9d (PHS) started service. Recently, in particular, there have further been active developmental efforts on a global scale of the next generation digital communications using the latest digital modulation technologies. The field of mobile communications is becoming increasingly active.
Such mobile communications, especially digital communications systems, often make use of the quasi-microwave band. Therefore, there have been strong demands for a switching circuit (high-frequency switching circuit) for switching high-frequency signals used in the portable terminals of these systems which is provided with not only superior high-frequency characteristics, but also the ability to be driven with a low voltage.
Since portable terminals handle signals of as high as the GHz band, switching circuits using GaAs FETs exhibiting excellent high-frequency characteristics are starting to be used for switching high-frequency signals in portable terminals.
FIG. 1 shows a switching FET constituting a basic unit of a high-frequency switching circuit. The switching FET shown in FIG. 1 is connected at its gate to a resistance element Rg having a high resistance value. As a result, the equivalent circuit of the switching FET can be represented as an on-resistance Ron of several ohms in an on-state and of a cut-off capacitance of several hundreds of fF in an off-state. The cut-off capacitance in an off-state is the combined capacitance of the series capacitance between a gate and a source or drain (both referred to as Cg in this example) and a capacitance Cds between the source and drain connected in parallel. Since the FET with a gate connected to the high resistance element Rg clearly exhibits a resistance characteristic and a capacitance characteristic in the on-state and the off-state in this way, it has excellent characteristics as a basic unit of a quasi-microwave band switching circuit.
FIG. 2 is a diagram of impedance changes in a gate bias state of a switching FET.
An impedance Zds between a drain and a source of the switching FET becomes sufficiently large when the gate bias voltage Vg is less than a pinch-off voltage Vp, while conversely becomes sufficiently low when the gate bias voltage Vg is close to the gate voltage Vf at which the FET turns on (referred to as a xe2x80x9cturn-on voltagexe2x80x9d hereinafter). Accordingly, when using this FET for switching, the gate bias voltage Vg(on) when the FET is turned on is set to be larger than the turn-on voltage Vf, while the gate bias voltage Vg(off) when the FET is turned off is set to be sufficiently lower than the pinch-off voltage Vp.
When such a switching FET handles a large power (large amplitude) RF signal, distortion and other disadvantages with signal deterioration occur. This distortion disadvantage at the time of large power input is related to the fact that it is impossible to obtain a large voltage difference between the gate bias voltage Vg(on) and Vg(off) when having to make the drive voltage as small as possible such as in a portable terminal. Namely, to ensure that Vg(on) does not fall below the turn-on voltage Vf despite the trend toward a small voltage difference between the gate bias voltages Vg(on) and Vg(off) due to the low voltage driving function, it is necessary to narrow the margin between the voltage Vg(off) and the pinch-off voltage Vp and, as a result, signal distortion easily arises in the off-state.
As shown in FIG. 2, when an RF signal is applied to the FET in the off-state, the gate bias voltage is subjected to modulation by the RF signal around Vg(off). When the RF signal has a large amplitude, the degree of modulation becomes large. When it exceeds a certain limit, the modulated gate bias voltage Vg becomes larger than the pinch-off voltage Vp as shown in FIG. 2. Finally, the FET is no longer in the pinch-off state, that is, an off-state, and as a result the waveform of the output voltage becomes distorted.
In order to reduce the signal distortion at the time of a large power input, a high-frequency switching circuit having a multi-stage configuration with a plurality of FETs connected in series is ordinarily used.
FIG. 3 shows an example of an FET switching circuit of a three-stage configuration.
This FET switching circuit 100 comprises a switching FET portion 101 and a short-circuiting FET portion 102 which is connected between the output of the switching FET portion 101 and a supply line (Vss line 103) of a common voltage and holds an output node of the switching FET portion 101 in the off-state at the common voltage. Each of the portions has a multi-stage configuration.
In the switching FET portion 101, the three FET 1-1 to FET 1-3 are connected in series between an input terminal Tin and an output terminal Tout of the high frequency signal, and gates of the FETs are connected to a common control signal input terminal Tc1 via high resistance elements Rg. Similarly, in the short-circuiting FET portion 102, the three FET 2-1 to FET 2-3 are connected in series between the output terminal Tout of the high frequency signal and the Vss line 103, and gates of the FETs are connected to a common control signal input terminal Tc2 via high resistance elements Rg.
In the high-frequency switching circuit 100 having the above configuration, in an on-state, all of the switching FET 1-1 to FET 1-3 are on and all of the short-circuiting FET 2-1 to FET 2-3 are off. When the high frequency switching circuit 100 shifts to an off-state, all of the switching FET 1-1 to FET 1-3 turn off and all of the short-circuiting FET 2-1 to FET 2-3 shift to an on-state. Even if there is a slight leakage of signal components in the switching FET 1-1 to FET 1-3 in an off-state, this is relieved to the common potential and therefore high reliable insulator at a high-frequency between the input and output can be achieved. That is, by being combined with the short-circuiting FET 2-1 to FET 2-3, the switching FET 1-1 to FET 1-3 can obtain excellent isolation characteristics when turned off without any accompanying signal loss at the time of an on-state.
By making each of the FET portions a multi-stage configuration, the RF signal voltage input is divided in accordance with the number of stages. While each of the stages of the FETs is subjected to RF modulation, though to a different degree, distortion is more difficult than in the case of a single-stage configuration since the input signal voltage is divided. Accordingly, a switching circuit with an FET portion having a multi-stage configuration features a higher maximum power handled and improved distortion tolerance at the time of large power input.
Next, the maximum power handled by this multi-stage configuration high-frequency switching circuit will be explained in more detail with reference to the equivalent circuit in the off-state.
FIG. 4 is a view of an equivalent circuit of the high-frequency switching circuit 100 shown in FIG. 3 in the on-state, that is, the state with the switching FET portion 101 in the on-state and the cut-off FET portion 102 in the off-state. Note that when the switching circuit 100 is in the off-state, for which the equivalent circuit is not shown, the state (on/off) of the switching FET portion 101 and the short-circuiting FET portion 102 becomes reverse to the case in FIG. 4. In both cases, the distortion of the output signal when one of the FET portions of the multi-stage configuration is in an off-state becomes a disadvantage. Therefore, the explanation will be made for an example of the short-circuiting FET portion 102 being in an off-state as shown in FIG. 4 here.
As mentioned above, the FET portion in the off-state (the short-circuiting FET portion 102 in FIG. 4) determines the maximum power handled when driving with a low voltage. Assume that an RF signal having a voltage amplitude of VRF is applied to the input terminal Tin, the decrease at the switching FET portion 101 can be ignored, and the sizes of the FET 2-1 to FET 2-3 in the short-circuiting FET portion 102 are the same. When the RF signal is applied to the short-circuiting FET portion 102, a voltage vrfn (n=1, 2, . . . , 6) whose average value is VRF/6 is respectively applied between the gate and the drain or source of the FET 2-1 to FET 2-3. This voltage vrfn has a voltage amplitude that give RF modulation to each gate, so if any of FET 2-1 to FET 2-3 leaves the pinch-off state by the application of this voltage, that is, vrfm greater than Vpxe2x88x92Vg(off), current leaks from the short-circuiting FET no longer in the pinch-off state to the common line Vss at that instant and generates a power loss. As a result, the RF signal that appears at the output terminal Tout becomes distorted at the peak side of the amplitude.
Generally, the maximum power handled Pmax of a switching circuit comprised of n-stages of FETs connected in series can be expressed by the following formula when assuming a load impedance as Z0.
Pmax=2{n(Vpxe2x88x92Vg(off))}2/Z0xe2x80x83xe2x80x83(1)
To increase the maximum power handled Pmax, it can be considered to increase n in formula 1, to set Vp high, or to set Vg(off) low. However, when the circuit is used in a portable terminal which has to be able to be driven with a low voltage, Vg(off) cannot be set very low as explained above. If Vp is set high, the on-resistance Ron of the FETs increases and leads to an increase of loss at the time of switching on (ground loss of leakage signal components in short-circuiting FETs), which is not preferable. Furthermore, in the case of increasing the number of stages n, it is necessary that each FET have a gate width of n times that of a one-stage configuration FET in order to realize the identical on-resistance Ron of a single-stage configuration. The increase of the area is inevitable just by increasing the number of stages n of the FETs, but moreover the gate width of each FET has to be multiplied by n. Therefore, the area occupied by the switching circuit becomes larger and leads to higher cost due to the increase of the chip area.
In this way, there is a tradeoff between the rise of the maximum power handled in a high-frequency switching circuit accompanying driving at a low voltage and the deterioration of switching characteristics or the increase of costs.
An object of the present invention is to provide a high-frequency circuit which uses FETs with effective gate portions divided into a plurality of sections, such as with a so-called inter-digital gate configuration, for a large power switch operatable at a low voltage, which is stable in operation of its FETs, and which is excellent in its ability to eliminate signal distortion.
To solve the above disadvantages of the prior art and to realize the above object, the high-frequency circuit of the present invention is a high-frequency circuit having a switching transistor with one of a source electrode and a drain electrode connected to an input terminal side of a high frequency signal and with the other of the source electrode and the drain electrode to an output terminal side of a high frequency signal and with a gate electrode connected through a resistance element to a control terminal, an effective gate portion of the gate electrode being divided into a plurality of sections, characterized by having an additional capacitance element which is arranged at a location in proximity to one ends of at least two effective gate sections among the plurality of the effective gate sections and which is connected in parallel to a capacitance element between a gate and a source or drain of the switching transistor.
Preferably, it further has between the output terminal and a voltage supply line of a reference voltage a short-circuiting transistor which is held in a non-conductive state when the switching transistor is in a conductive state and which shifts to a conductive state when the switching transistor becomes non-conductive.
The short-circuiting transistor may be provided with an additional capacitance element in the same way as the switching transistor.
At least one of the switching transistor and short-circuiting transistor may be provided with additional capacitance elements at all of a plurality of unit transistors formed by division of the effective gate portion. Alternatively, additional capacitance elements may be provided at suitable locations of any of the unit transistors where a large effect of improvement of the characteristics can be expected (for example, between the gate and source or drain of the unit transistors positioned at the two ends of the series connection).
The additional capacitance element may be comprised by a so-called MIM capacitor (metal-insulator-metal capacitor). Specifically, the additional capacitance element may use a connection portion of the gate electrode connecting at least two effective gate sections as one of the capacitor electrodes and use an electrode portion of the source or drain overlapping the connection portion through an inter-layer insulating film as another capacitor electrode.
In the high-frequency circuit having the above configuration, a cut-off transistor is off when the built-in switching transistor is in the on-state. When the switching circuit is in an on-state, its output side is grounded via a sufficiently large capacitance and is open in terms of high frequency, so an input high-frequency signal can be output almost without loss.
On the other hand, when the switching transistor is turned from on to off and the cut-off transistor is turned off from on, this switching circuit is turned off, the input side and the output side are insulated by high-frequency due to a sufficiently large cut-off capacitance, and the output side is grounded via a small resistance. Accordingly, even if a signal leaks from the switching transistor, this can be relieved to the ground potential, so that a high insulation characteristic can be obtained between the input and the output.
Especially in the high-frequency circuit of the present invention, because additional capacitance elements are arranged near the connecting portion of the effective gate sections obtained by division in at least one of the switching or cut-off transistors, the impedance as seen from each of the units transistors, that is, the additional capacitance, and the inductance etc. of a connection line are balanced and the parasitic component itself is small. As a result, the operation of the switching or cut-off transistor becomes stable.
The balanced arrangement of additional capacitance elements raises the limit of the applied voltage which does not cause signal distortion of the unit transistors. Therefore, even if a signal having a larger enough amplitude to cause distortion is applied, it is possible to output a high-frequency signal having a large amplitude without causing any distortion of waveforms until reaching one of the limits of applied voltage of the unit transistors with additional capacitor elements whose limits were raised or the limits of other unit transistors without additional capacitance elements. Namely, the power distortion tolerance in the switching circuit as a whole is improved. Also, the improvement of the power distortion tolerance means greater leeway for driving by a low voltage while maintaining the strength (large power) of a high-frequency signal handled.